A logic analyzer is a test and measurement instrument having multiple input channels for acquiring digital data words for processing and display. Logic analyzers contain Word Recognizers, which are programmed with a reference value for comparison with incoming acquired data. Because the user wishes to trigger on a condition in which the reference value matches the value of the incoming data, the “reference value” of the Word Recognizer is preprogrammed before data acquisition is begun, and is not changed while data is being acquired. It is noted that Word Recognizers also have the ability to mask, or disable selected channels, which allow these channels to be ignored while comparing the acquired data and reference data.
However, currently available Word Recognizers cannot provide a solution to the following problem. In a Random Access Memory (RAM) diagnostic routine, a data pattern is written to all locations of the RAM, and then the data is read from each of the locations. The routine then reports the results (i.e. whether the RAM passed the check) and the process is repeated with the next pattern. If an error is detected, it is unknown whether the problem occurred when the data was written to the RAM, or when the data was read from the RAM. Because the RAM has been overwritten, the RAM cannot be examined to determine if it contains the correct value. One would like to write a trigger program to verify that data written to the RAM is the same as what is read back from the RAM and to trigger the Logic Analyzer when the data is not the same. With current logic analyzers this is not possible because the data pattern is changing, which means it is not possible to preprogram the “Reference Value” of the Word Recognizer with a meaningful value.